I am using ncverilog with 45nm cadence pdk and i am getting the following error:

| ncelab: *E,CUVMUR (./ihnl/cds0/netlist,19|10): instance 'test.top@Inv_1.PM0' of design unit 'pmos1v' is unresolved in 'worklib.Inv_1:verilog'. nmos1v NM1 ( .D(Vout), .B(cds_globals.gnd_), .G(Vin), | ncelab: *E,CUVMUR (./ihnl/cds0/netlist,21|10): instance 'test.top@Inv_1.NM1' of design unit 'nmos1v' is unresolved in 'worklib.Inv_1:verilog'. ncxlmode: *E,ELBERR: Error during elaboration (status 1), exiting.

I believe that a few library files are missing. However, even after going through the cadence manuals, i am unable to come to a conclusion.

When i tried using ncverilog with 250nm PDK, it worked fine. Is ncverilog not compatible with 45nm?

Any insights/ help would be highly appreciated.

Thank you!