I got some troubles about deposite SiNx or BN on silicon wafer. The main parameters I used was shown below:
SiNx:
DC current: 150/250 mA, Power is 50/80W
Gas: 10/10 sccm Ar/N2, and pressure: 2.0 mtorr
Time: 5~30 min
Si target.
BN:
RF power: 350W
Gas: 20sccm Ar and pressure: 2.0 mtorr
Time: 20 s~10 min
BN target.
I covered one side of the Si wafer to make step and then measure thickness of the coating, but sometimes the covered side was even higher then the uncovered side. So is the Si was etched during sputtering process? Thanks for your answer!
When you cover one side and shield the other, isn't it exactly the result you want that the covered side to be higher than the uncovered one?
Jürgen Weippert Coatings should be deposited on the uncovered(by tape) side, so it should be higher than covered side.
Ah, OK, to me the "covered side" would be "the side which got covered by the coating", what you mean is what I would call "masked side".
Anyway, then on to your problem. When you work with RF, things can indeed go in the wrong direction if there is a short or a contact break in the system, although in the one occasion in which I've seen that the etching effect was ultraweak, so we just saw in EDX that chamber wall material had been deposited in the location in which an etching process should have taken place.
How did you measure the thicknesses? Was it a microscopy value, ellipsometry, XRR or something else?
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