Hello,

I am using CST Studio to simulate an interdigital capacitor and to extract its S-parameters of it. in order to process those measurements and obtain the parasitic elements that it contains. However, when I calculate the equivalent capacitance and inductance of it, it has negative and imaginary values, which do not make any physical sense. Therefore, I wanted to know if I was simulating it in the correct way. I put two ports, one in the input, and another one in the output and I put all the boundary conditions in 'open'. About the ports, I calculated the microstrip ports using the CST macro. I have attached a picture of the design to make it more clear. (perspective, top and bottom view).

My question would be: Should I use these boundary conditions? Is this the correct way to put the ports? Should I do any modifications to obtain a coherent result?

Best Regards