We are trying do patterning over Silicon Dioxide by MLA. Please share your experience. It will be helpful if you please share the condition like Room Temperature, Humidity, Photo resist, Pre-bake Time, Expose time, Develop time (Developer Name).
Dear Zadid Shifat,
You may find some useful info below:
Time-Efficient High-Resolution Large-Area Nano-Patterning of Silicon Dioxide
A nano-patterning approach on silicon dioxide (SiO2) material, which could be used for the selective growth of III-V nanowires in photovoltaic applications, is demonstrated. In this process, a silicon (Si) stamp with nanopillar structures was first fabricated using electron-beam lithography (EBL) followed by a dry etching process. Afterwards, the Si stamp was employed in nanoimprint lithography (NIL) assisted with a dry etching process to produce nanoholes on the SiO2 layer. The demonstrated approach has advantages such as a high resolution in nanoscale by EBL and good reproducibility by NIL. In addition, high time efficiency can be realized by one-spot electron-beam exposure in the EBL process combined with NIL for mass production. Furthermore, the one-spot exposure enables the scalability of the nanostructures for different application requirements by tuning only the exposure dose. The size variation of the nanostructures resulting from exposure parameters in EBL, the pattern transfer during nanoimprint in NIL, and subsequent etching processes of SiO2 were also studied quantitatively. By this method, a hexagonal arranged hole array in SiO2 with a hole diameter ranging from 45 to 75 nm and a pitch of 600 nm was demonstrated on a four-inch wafer. (PDF) Time-Efficient High-Resolution Large-Area Nano-Patterning of Silicon Dioxide.
https://www.researchgate.net/publication/312264500_Time-Efficient_High-Resolution_Large-Area_Nano-Patterning_of_Silicon_Dioxide
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Ultra-Shallow Phosphorous Diffusion in Silicon using Molecular Monolayer Doping
Astha Tapriya
A Thesis Submitted in Partial Fulfillment of the Requirements for the Degree of Master of Science in Microelectronic Engineering
Approved by: Dr. Santosh K. Kurinec (Thesis Advisor) Dr. Scott Williams (Thesis Committee) Dr. Ivan Puchades (Thesis Committee) Dr. Robert Pearson (Director, Microelectronic Engineering Program) Dr. Sohail Dianat (Head, Electrical and Microelectronic Engineering)
DEPARTMENT OF MICROELECTRONIC ENGINEERING KATE GLEASON COLLEGE OF ENGINEERING ROCHESTER INSTITUTE OF TECHNOLOGY ROCHESTER, NEW YORK
JULY, 2017
https://scholarworks.rit.edu/cgi/viewcontent.cgi?article=10682&context=theses
Hi Zadid Shifat
I assume you do the lithography and then etch the SiO2 using a photoresist as a mask.
The choice of Photoresist ( and related parameters e.g. developer and time durations) depends on how much thickness of SiO2 you need to etch. I would suggest visiting a cleanroom, if you have access to the one nearby, to inquire about the photoresists they have. Standard Photoresist like AZ 1514 or thicker like AZ 4562 would work, but these are just suggestions. Developers and the related information follow the choice of photoresist you make, along with its tone ( positive or negative). Looking at the below link might be helpful to check out the related information about resists.
https://www.microchemicals.com/products/photoresists/az_1514_h.html
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