I 'm trying to design an algorithm for computing the depth map of two stereo images in real time. I intend to do both hardware and software implementation on CPU(ODROID XU4) and hardware implementation on zedboard. The thing here is that I have a parallelized hardware architecture for the FPGA implementation . My question is it good to base the software implementation on the hardware one when trying to achieve the best level in parallelism , in simple words converting the blocks of the hardware architecture into processes in the software implementation ?
If you've already got an FPGA implementation, you should first look at the degree of parallelism in the FPGA: if it doesn't exceed the number of cores in your ODROID, porting might be comparably easy.
In general, porting of an FPGA implementation to software should be possible, but might not always yield the best results. This is due to the fact, that the computational capabilities of the FPGA fabric and some microcontroller's core differ significantly: usually the capabilities of the FPGA can be summarized as "simple, "linear" and really fast" while a microcontroller is better in execute "conditional" code (code with more or less numerous decisions/branches).
U. Dreher Thank you for your feedback. the ODROID XU4 has eight cores so for sure. the level of parllelism in FPGA is higher, take for example the Atlys board(spartan 6)it 58 dsp slices which means may compute 58 arithmetic operations in parallel. However, the frequency level will be higher in CPU systems at a lower power cost. and to answer the second part of your reply, from the begining I'm expecting the performance to slow down in the ODROID compared to FPGA.
Aparna Sathya Murthy That's an important fact, when we talk about ODROID it has an ARM processor so the efficiency will be even better than an intel CPU at a much lower cost, but what if we try to combine both approaches hardware and software, take for example the Zed board it has a double core ARM processor an an Artix7 FPGA, the question is how can I design my system so that I can take advantage of both approaches
The probelm of GPUs is that they consume high power compared to FPGAs, so they are not suitable for systems that use small batteries as their main source.
The "level of parallelism" in #s of DSP slices is hardly comparable to the # of cores of a microcontroller!
An FPGA DSP slice is fast , but quite limited. Thus, some single "signal processing chain" might "burn" quite a number of DSP slices.
Regarding the use of a Zed board (or similar approaches sporting integrated processors):
As the FPGA fabric is good at everything that doesn't require decisions, the usual approach is to implement any "preprocessing" (e.g. filtering, convolution with some core(s)) in the FPGA fabric, leaving the "real processing" (edge tracking in an already prepared image) to the integrated microcontroller.
Finding correlated edges in some prepared dataset(s) might be something the FPGA is good in --- but this is just an idea :)
of course if the arithmetic operations are complex many DSP slices might be burned for a single operation
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