Can anyone tell me how to do onchip inductor layout simulation that is available in pdk?

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Alan Victor

If you are doing a tapper inductor, Hartley topology, set it up as two inductors which are series. You will need to make the series connections as a pair of via. And place the via connection on another metal layer. The metal and dielectric stack-up needs to be appropriate for you inductor construction.

Whose pdk are you using? Did you check the metal and dielectric stack ups?