At beginning era of digital design, the binary logic is used in all industrial applications. The binary logic uses 2 states i.e. 0’s and 1’s to represent each state. Since the binary logic uses 2 states, it requires more number of bits to represent a number.
The ternary logic uses less number of bits to represent a number compare to binary logic. It also reduces the area and also the power of the circuit. The ternary logic uses 3 states i.e. 0,1,2 where logic 0 is considered as low state and logic 1 is considered as middle state and logic 2 is considered as high state.
The quaternary logic uses 4 states i.e. 0,1,2,3 states. The quaternary logic further reduces number of bits and also enhances the power compare to binary and ternary logic.
Dear Ajay Rupani,
The following article seems to contain a good example of explanation to your question:
https://www.sciencedirect.com/science/article/pii/S1665642317300378
Dear Ajay Rupani, Comparing ternary and quaternary logic is dependent on the application and its requirements, due to at the simplest comparison, the trade-off between density and noise margin. Moreover, the number of transistors per gate and PDP is different, therefore based on the number of required digits for a specific SoC, the efficient logic can be binary, ternary, or quaternary; because the main advantage of MVL is reducing interconnections, so increasing in number of digits results in increasing in interconnections which can be compensated by MVL
Dear Ajay Rupani ,
It is so as the logic value gets higher the number of interconnects become smaller. So, quaternary is more effective than the ternary. The other issue is that the quaternary logic can be easily converted into binary logic.
But as the value of the logic increases the power consumption may get larger as the power is proportional to the amplitude square.
Best wishes
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