I designed a plasmonic slot waveguide using gold on top of the 2 micron oxide layer and below the oxide layer, I used silicon as substrate. the idea is to optimize the waveguide dimensions (slot width, metal thickness, rail width). I used mode analysis method within COMSOL to evaluate the possible mode. the problem is for metal thickness above 100 nm, we have radiation into the silicon substrate which affect the results significantly. as boundary condition, I used scattering boundary condition and the domain is large enough to minimize the spurious reflection. Do I count silicon in my simulation or should I remove it from my simulation?
if I keep silicon in my simulation, How can I remove the radiation or at least have radiation as less as possible?
any help will be appreciated.
#COMSOL
#Slot_waveguide
#Plasmonics
#Mode_analysis_method
#Optimization
Hi Parviz,
Are you optimising your waveguide geometry for subsequent fabrication or just experimenting with Comsol? In the case of the former, you could try increasing the oxide thickness in order to prevent the mode from radiating into the substrate. This is a realistic approach.
Vasileios
Vasileios Mourgelas
Hi Vasileios,
Ideally, it has been designed for subsequent fabrication. Should I increase the oxide layer to 3 to 4 micron or it can be increased more than 4 microns?
another question is that potentially, how much thickness should I put below the oxide layer for silicon substrate?
@Parviz Saeidi
Hi,
The oxide can be quite thick in practice so 4 μm or 5 μm is fine. You need to start with the smallest possible oxide thickness that gives you acceptable radiation into the substrate. Another thing you can look into is using shorter excitation wavelength (if possible).
As for the Si thickness, you could perform a convergance test and find out how much is enough.
Vasileios
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