Actually, I am doing layout in cadence, in pre-layout simulation I got gain around 80dB,but in post layout the gain reduce to around 70dB due to excessive parasitic capacitance and resistance. I have PEX using calibre tool. Can anybody tell me the way to reduce parasitic in my layout?
Dear Sourav,
welcome!
Reducing parasitic is accomplished by reducing the lengths of the interconnect wires especially for the gain stages. There is layout tools which results in an optimum layout concerning the performance parameters.
If you could not reduce the lay out parasitic and you want a specific gain then you have to target a sufficiently higher gain to end up with the required gain after layout.
Best wishes
In calibre option for cc , crc rc , you can reduce parastics ..... while extracting PEX... if validates for design ..other wise re-draw layout....
The 1st resource is good for capacitance. For resistance, you need to make your tracks wider or 'double them up' (putting parallel lines on top of each other with the maximum number of vias between them). Ultimately this will help you increase the cross-sectional area of your conductor in the path that suffers from parasitic resistance.
A note of warning though: these techniques will increase your parasitic capacitance (some more, others less, depending on what other metals and/or substrate material lies around them). So make sure you understand what the limiting factor is on your nodes: parasitic R or parasitic C and then mitigate accordingly.
Jagdeep Kaur Sahani hello mam..do you have any idea about monte carlo simulation using cadence for sram cell or other citcuit?
In an amplifier it is important to do the layout carefully. Some ways can be
1) common-centroid layout
2) C,CC will not matter much bec's of DC gain reduction here where C/CC are open. One possibility of reduction in gain can be change in bias levels after layout. So look for metal routing.
3) Tools and models are smart enough to take care of all the necessary things in pre-layout. Only addition will be metal routing in layout that can change the DC gain.
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