6 Questions 20 Answers 0 Followers
Questions related from Hemant Kumar
How to design memristor based design using cadence virtuoso ? i have designed 1. AND gate Input voltage 1V (pulse signal) applied for in1 and in2 but output waveform is not proper please...
05 March 2020 6,132 8 View
how to design adiabatic logic circuit? actually i am using PFAL and ECRL logic suppose for basic logic circuits inverter, NAND, NOR which power source should use VPULSE/VSIN? using cadence...
21 February 2019 8,822 2 View
Hello friends, As we all know high quality images are required for good quality journals. So How to get high quality picture of schematic and simulation waveform from Cadence Virtuoso Tool? or...
29 November 2018 8,603 8 View
Please suggest me list of scopus indexed journals with rapid publication and low publication charges in the field of electronics/VLSI/Circuit design? plz reply asap
02 November 2018 5,613 14 View
I want to plot Transfer curve for NMOS Depletion load inverter using Cadence virtuoso tool, for that from where i can get depletion mode NMOS? i have GPDK 45, 90 and 180nm and using Cadence...
14 September 2018 2,019 5 View
Hello sir/mam i am using Cadence virtuoso design tool i have generated symbol of CNTFET ( n and p type) as per Standford compact veriloga code by NCFET_L3.va then i designed inverter. I want to...
07 June 2018 2,159 6 View
