I don't know if your question makes sense as it is. The DPA attack is performed by external measurement of power traces, there is no circuitry in the original circuit that is put in place to make the DPA attack happen. Maybe you are referring to a different attack, since in classical DPA there is no change in power traces before, during, or after attack.

Maybe you could utilize FPGA for that。。。

You can use the output file of the logic simulations that contains all signals probed in your simulated design (i.e. each transition of the signals, and the corresponding simulation time stamp). Then, the data in the VCD file can be used to estimate the power consumption of the design. One option is to use MATLAB toolbox to analyze the VCD files .

Power consumption at that level is very far from reality, far from a a fabricated chip. It is an estimation, and frequently not even close to the actual numbers. It would not be sufficient/good enough to mount a DPA attack.

first design s box in cadence and write python program for dpa attack and perform dpa attack