I am working towards the robust mapping of a hardware piece to a DSP FPGA. I have developed a C program to obtain the inverse of a 4x4 matrix using the QR decomposition technique. my next step is to port the C program to VHDL using 16 bit fixed point arithmetic (Qn.m) format. Can any one be of assistance to me?
You can use vendor specific IP blocks from Xilinx or Altera i think both support 16 bit fixed point. Otherwise there is a synthesizble library with fixed and floating point types in vhdl. You can see the float and fixed types that you can use if you look source file fixed_float_types.vhdl in the standard ieee library folder from Modelsim
Thanks George, I shall prefer the vendor specific IP blocks from Altera, can you please send a link to getting it to me?
You can go to the Altera website for more. In order to use IP you have to license their SDK (Quartus) and then you will be able to generate your custom IP
Doing your translation by hand is quite cumbersome. Xilinx has software HLS which ports C code to VHDL. If the C code is written according to some rules the transformation works quiet well. You can even use floating point arithmetic in the C program and the VHDL will use floating point as well. According to my experience for matrix inversion floating point is preferable.
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