Dear Manolis Magdalis ,

You may not find built in models for the the single electron circuits in pspice but surely you will find cmos transistor models integrated in the model library of the psipce. In this case, you can either build your own model for the SET or can use another advanced platform for the the simulation of the hybrid CMOS/SET devices and circuits.

One of such newly developed platform is described in the Link:http://www.ece.ucsb.edu/Faculty/Banerjee/pubs/ICCAD_2003_SET.pdf, which may be a good starting point to solve such problem.

In case you want to use pspice and you want to build your own model for the SET,

then the this link contains the required spice model directly:ieeexplore.ieee.org › ... › Design and Technology of Inte. The paper;Analytical modeling of single electron transistor for hybrid CMOS-SET analog IC design, is very useful to you, To get the paper follow the link:http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=1347394&url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel5%2F16%2F29674%2F01347394.pdf%3Farnumber%3D1347394

I hope this will help.

wish you success

Hello Manolis

You may not find a model for hybrid CMOS/SET device. You have to build your own model using any analytical model published before.

You can find some simulation environment for Single electron devices like SIMON (http://www.lybrary.com/simon/), but you cannot use CMOS with it. It is a Monte Carlo simulator using only resistor, capacitor and single electron tunnel junction.

I have published one analytical model before and I have built this model in Spice.

Here is the like to the paper: http://www.sciencedirect.com/science/article/pii/S0026271410005421

Here is the link of my MSc thesis:

https://www.researchgate.net/publication/234114616_Modeling_and_Simulation_of_Single_Electron_Systems_for_Nanoelectronic_Applications

Best wishes

Thesis Modeling and Simulation of Single Electron Systems for Nanoe...

Thank you both very much for your help!

Is there any case of finding an already designed macromodel for hybrid CMOS/SET transistor?