Nano imprint lithography has a high throughput. This process also has the promize of repeatability and durability which consequently leads to low costs and ease of fabrication. Despite of such advantages, why is it not used for device (MOSFET) fabrications?
Nanoimprint does not have high throughput. The standard 193i scanners you can buy today can process greater than 200 wafers per hour. At SPIE this week, Canon presented very impressive progress with their nanoiomprint tool, the 1100, but it is (if I recalll correctly) 20-40 wafers per hour. They presented a roadmap to > 200 WPH, but it's not guranteed that they can get there. There are fundamental time delays in spraying the resista and waiting for it to wet fully onto the imprint mask.
Defectivity is obviously a concern. They have impressively low defectivity given the nature of the technology, but it's still a few orders of magnitude higher than the standard fab tools. So, we'll wait to see if they can deliver on their roadmap in this area as well.
Yes, the potential benefits (variability, arbitrary shape printing) are enticing, but still a long way to go to approach high volume manufacturing.
Greg has some good comments. I can think of two main problems. The first, as Greg mentioned is defectivity. The second is alignment. Nonetheless, printing is so expensive these days that imprint is still worth looking at as a potential solution.
Another issue confronting nanoimprint is the residual layer formed from imprint. Not a good thing for semi or MEMS applications. If the formed pattern can be hardened, then use of solvent can remove.
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