What do you mean by stability? Write/Read/Hold Margins? 

If considered so, yes there will be some kind of relationship but it will vary for a given technology. As for the higher margin, you may need either higher supply voltage/larger area, Assist circuits, etc. and that will increase power consumption.

Hope this helps!

Good luck!

Dear Divyang

of course these metrics are interrelated, the read SNM for the 6T SRAM cell depends on the cell ratio (pull down  to pass gate tr. aspect ratio). if u increase CR SNM will increase but it effects the access time and hence power

Hope this helps!

yes it is understandable...

Thank you all for valuable ans...

But i am in search of exact mathematical formulation or any research study on this question.......

Hi, i think the threshold voltage may be keyword, you can find Read SNM formulation in "Static-noise margin analysis of MOS SRAM cells" (the attached file). generally speaking， the Vth is bigger, the consumption power can be lower. the SNM is mainly affected from NMOS Vth (specially PD MOS). With technology development, the write SNM is becoming important because the VDD is lowed and the cell area is limited. 

all those are my opinions. i hope we can learn from each other!