In MOSFET small signal analysis, we can relate charge (Q) and capacitance (C) using the formula Cij = dQi/dVj. Is the voltage term (dVj) calculated across the electrode terminals 'i' and 'j' ? Or is it between electrode terminal 'j' and GND?
For example: Cgs = dQg/dVs; where g=gate and s=source. Is this voltage (dVs) between gate and source? or between source and ground?
As in any capacitor, yhe capacitance is defined with respect to the voltage drop between the two electrodes of the device (i and j in your picture).
Aparna Sathya Murthy ,
You aare right in specifying that the capacitance is expressed by the dielectric between the two interfaces with conductors, and I would add that its value is specific of the dielectric itself. For example, the capacitance of the gate oxide is of course epsilon_ox x thickness / gate area. The fact is that in any case, the answer to the original question is that the voltage drop which charge the capacitance is that applied to the dielectric interfaces, not between one of the interfaces and ground. Of course, if one of the interfaces is grounded, one can say that dV is between the other interface and ground, but i is just a special case. It is semantically true when a PowerMOSFET is operated in static regime (away from swithching phases) and the source electrode is kept at ground potential, so the gate-source capacitance is named a gate-to-ground parameter just because the source electrode is grounded.
Of course we agree on the meaning of dynamically active parasitic terms playing a role in switching speed and power, such as Ciss, Coss, Crss, but again the (time-dependent) voltage drop across the involved capacitors (e.g. Cgd) applies across the same capacitors which, by the way, are dynamically involving not only an oxide, but also a modulated depletion zone which behaves as a dielectric between the two conductive materials (as in the case of Cds) or are in series to an oxide capacitor (as in the Cgs - when surface inversion is not reached - or Cgd)
Dear Premkumar Vincent ,
all (parallel) capacitances matter, whenever your source electrode is in a grounded[1,2] configuration mode(s).
Also, it matters, usually[1,3], your (setup system) measuring (parallel) capacitance, more capacitance (+Csetup_system), when you are in a measurement phase, so you have: CTotal=C1+...+Cn + Csetup_system).
1. CTotal=C1+...+ Cn+ : Ci , all in parallel (for a grounded configuration mode).
2. What are MOSFETs? - MOSFET Parasitic Capacitance and Its Temperature Characteristic https://techweb.rohm.com/knowledge/si/s-si/03-s-si/4873
3. See (/check_up) the input capacitance (Ci in the specs) of your measuring system (instrument '+' cables '+' sample_holder). Most setup desktop systems are (virtually) grounded.
Thank you all for your answers Aparna Sathya Murthy Giuseppe Curro Ioannis Samaras . If I may ask an additional question,
In this article: http://in4.iue.tuwien.ac.at/pdfs/sispad2012/2-5.pdf
The equations 2 and 3 assume that the time dependent voltage vg = Vgs and vd=Vds. It says that the source and body are grounded and so the terms vs=0 and vb=0. My question is, aren't the terms vg, vd, vs, vb all represent the voltage across the capacitors Cgg, Cgd, Cgs, Cgb in equation 2? If so, why do they assume vs=0 and vb=0? Shouldnt vs=-vg and vb=-vg?
Premkumar Vincent ,
voltages is always applied to ONE point of the circuit (or may transfer by conductive connections also to other points). Therefore, when you read for example Vb it means the voltage applied to the Base electrode of the mosfet.
Capacitors, on the other hand, always involve a couple of circuit points, the electrodes of the same capacitor which are statically decoupled each other by the same (dielectric in) capacitor. So you have two indices for C and one for V. If you read somewhere Vab, that is a voltage with two indices, that is to be viewd as Va-Vb.
In the case of your equation, Vg, Vb, Vs, Vd are voltages at the Gate, Base, Source; Drain terminals, respectively, ... NOT across any capacitor., and they are fixed at mutually independent values. What is applied ACROSS a capacitor is a voltage DROP, that is a voltage difference between the values at the capacitor terminals (e.g., Vgs=Vg-Vs across Cgs).
The only exception in the article you cited is in the so-written Cgg capacitance, a truly unhappy choice of the authors, who however just explain what it is just a line below eq. 2 : they call Cgg the "total gate capacitance", not to be intended as a Gate-to-Gate capacitance which would not make any sense.
Thank you very much Giuseppe Curro for your prompt answer. It was exactly what I was looking for. Thank you for your detailed explanation of the terms.
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