How to implement 5 input 2 output logic using one 5x2 LUT in FPGA?

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Muhammad Abdullah Hanif

Dear Ghaffari,

Thank you for the reply

As far as I know, in each 6x1 LUT there are two 5x1 LUTs (which can have the same inputs) and the sixth input of 6x1 LUT is the selection input of the MUX. If you see it in this context can't we use five inputs for both the outputs?

Yasir Amer Abbas

https://www.allaboutcircuits.com/technical-articles/purpose-and-internal-functionality-of-fpga-look-up-tables/