Dear Ajay Yadav ,

The most straight forward method is to precalculate the codes and store them in FPGAs memories. Then you need only to read these codes and steam them with right clock. The other method is to execute the algorithm calculating such codes by VHDL code. There is compilers called Xilinx system generators that converts Simulink code into VHDL code.

The second solution may take more time than the first method.

Best wishes

Dear Ajay Yadav ,

As for the speed of operation we treated this point while designing transciever circuits for Gigabit ethernet using FPFAs.

For details of the design please refer to the link:Article FPGA implementation of 1000base-x Ethernet physical layer core

and the paper:

Article ASIC Design and Implementation of 25 Gigab it Ethernet Trans...

For more help you can ask the first author of the paper. She is my coworker.