Conceptually the needed bias current depends on the required transcondcuatnce of the am[amplifying device. In case of bipolar transistor the transconductance gm= IC/Vt where IC is the DC operating collector current and Vt is the temperature equivalent voltage,.

In MOS transistors gm= un Cox (W/L)( VGS- Vtn),

ID= un Cox (W/2L) ( VGS- Vtn),^2

with the symbol have their usual meaning, Vtn is the threshold voltage of the nMOS transistor.

So, gm = SQR(2 un Cox (W/L) ID)),

So, the required gm can be achieved by ID and W/L.

Increasing W/L will increase the area of the transistor and its parasitic capacitance.

The required voltage gain is determined by gm RL where RL is the load of the amplifier.

For more concepts about the amplifier design please follow the book: Book The bipolar transistors, theory and basic applications

Best wishes

Please look at my book

American University Laboratories for Electrical Engineering (part 3)

You will find

A good example.

You can find in books by Allen and Holberg (CMOS Analog Circuit Design) and R. Jacob Baker (CMOS circuit, simulation and layout)

Abdelhalim abdelnaby Zekry While designing an OTRA I have to focus on achieving Rm as infinite. There's less focus on the transconductance. As I have to verify the port relationship Ip=In and keep the input current range as large as possible.

Nupur,

Thank you for reporting your approach to satisfy the requirement on the ORTA.

But i would be more useful to display the circuit part intended and show in it the intended currents and what do you mean by Rm.

My first answer meant the bias current of the differential pair amplifier.

Wish you success!