I am new to FPGA and I am studying the basics of the connections OR interfaces of different components with FPGA, like USB, Ethernet etc.
On Xilinx FPGA evaluation boards, there is also an external memory (DDR2, DDR3 etc.) attached. I searched so many documents and also checked on the Xilinx website to find the interface of this external memory with FPGA.
My question is:
How this external memory is connected to FPGA? Does it need any additional IC, Chip etc in between OR it can be directly connected to the pins of FPGA?
Thank you in advance for your help.
Regards,
Raza
In Xilinx FPGAs this is typically done through the Memory Interface Generator IP core (specific pins of the FPGA device are connected to the on-board DDR memory) . You may look at the following official Xilinx documentation and in concrete in Chapter 5:
https://www.xilinx.com/support/documentation/ip_documentation/ultrascale_memory_ip/v1_4/pg150-ultrascale-memory-ip.pdf#nameddest=xDDR3DDR4UserInterface
Another page with a detailed list of Xilinx documentation for the topic you are asking is the following:
https://www.xilinx.com/support/documentation-navigation/design-hubs/dh0061-ultrascale-memory-interface-ddr4-ddr3-hub.html
It varies from board to board. Try this resource
https://www.xilinx.com/video/fpga/spartan-6-memory-resources.html
Memory is connected to the xilinix fpga chips by memory controller and interfaces which is implemented on the fpga by using software called Memory Interface.
Please refer to the link:https://www.xilinx.com/products/intellectual-property/mig.html
As an alternative, one can implement an embedded CPU in the fpga and use it to control the external memory, The embedded processor can be used to control the data transfer from the external memory and the fpga.
Best wishes
You can connect the DDR2, DDR3 directly to the FPGA with no compiler errors, however, how you are going to store or fetch data from that memory? so you need to use a memory controller to mange data store/call between the FPGA and the external memory. Sometimes you can built that controller by yourself. For example, with the Altium 3000 FPGA, you can implement your design with the Altium Designer software. You can use the schematics to put the DDR on your design sheet, then design a memory controller using VHDL/ Verilog, put the schematic of that controller and connect it to the DDR from side and your FPGA design from the other side. Remember, when you have a digital system design, you always need controllers to manage signal transfer between design components,
This is like Intel 8086 microprocessor.
First find the circuit diagram. Do the connections. You can google it.
Second the software and hardware have the be compatible.
This is done by memory organization.
DDR memories can be connected directly to the FPGA. One just need to pay attention to the voltage of the interface, and also the protocol. To do both, you just have to connect DDR pins to the dedicated pins on the FPGA, and use the appropriate power supply for power pins of the IO bank of the FPGA. Then, you can use DDR controller IP in your FPGA design.
On some FPGA such as Zynq, there are multi-core processors, with the DDR controller. So no, need to add an IP to your design.
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