I've a circuit based on some Texas instrument DC-DC converters in OrCAD. I want to attach some glue logic based on Digital Gates in form of a verilog code in OrCAD. How to implement this?
From a simulation point of view all analog simulations are done on a circuit level of modelling, most likely by some compatible version of SPICE. Since you are designing using OrCAD I'm guessing PSPICE.
Now HDL codes are on a higher (gate) level of abstraction. To bring it down to SPICE level you need SPICE models of all gates you use. Depending on which technology you plan to implement your HDL codes on, it could be technology libraries from IC foundries, or any free libraries for education purposes such as Nangate or SAED libraries. ASIC design tools offer automatic translation from your HDL design to SPICE description given said library information. I personally did this translation using Synopsys' PrimeTime, so at least that much is possible. Then you should be able to hook it up with your SPICE netlist of DC-DC converter manually.
One another problem with your particular task is that in reality transistors on a piece of silicon do not directly connect to PCB or another IC without first passing through some I/O pad, bonding wire and then its own packaging. Depending on your requirement of simulation accuracy, capacitors and inductors with empirical values might be sufficient.