I want to measure the change in threshold voltage due to drain bias voltage for Graphene field effect transistor, but it has zero band gap. So, it produces larger punch-through and it is difficult to calculate the change in threshold voltage from drain current vs gate voltage characteristics as we did in the conventional MOSFET.
From your question I do not understand if you are talking about theory or experiments.
However, in all cases, you should only assume a dependence of threshold voltage on Vds if the channel is extremely short. If this is not the case (and in experiments it hardly is), the dependence of the drain current on Vds should be attributed to effective channel length modulation, or to the addition of a current component due interband tunneling, which is not physically associated to the threshold voltage.
In conclusion, the threshold voltage is a quantity related to electrostatics, and only an electrostatic effect of the drain voltage should be taken into account (e.g. DIBL). Other effects (e.g. tunneling) should be taken into account with other model parameters.
Dear Brajiesh,
You measured the the drain current versus the gate bias voltage for different values of VDS. From such curves you can determine the cut in voltag or the threshold voltage for diifferent values of VDS. In this way you can get out the effect of VDS on Vth. Did you found any change? If i underhand, you did not find any dependence. You explain this by an early punch through. I may agree with you since early punch through render the device uncontrollable. Can you display the i-v curves such that we can share more effectively in the discussion.
Wish you success.
Respected Sir,
Thank you very much for your suggestions
I am attaching more description of my problem in the slides. Giuseppe Sir I remove inter-band and intra-band tunnelling and plot Id-Vgs characteristics, but it is still difficult to calculate change in thresold voltage.
Dear Brajesh,
I saw your i-v curves and i have the following comments:
- You have to extend the the measurements of the ID -VDS to negative values of VDS to get the minimum current point which is assumed to be at the threshold point.
- You have to measure a set of ID versus VDS for different values of the gate voltage.This is the drain family of curves.
You have to complete the measurements before interpreting the results.
In conclusion, you have to complete your measurement for decisive conclusions.
-To get out the effect of short channels you can fabricate transistors with different channel lengths and compare hem. This will surely help you.
My best wishes.
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