Atpg method for the implementation of FPGA's??

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Digestibility of nutrients in commercial fish feeds?

Dear all, I am looking for nutrient digestibility coefficients (ADCs) for commercial feed used in several fish aquaculture species (D. labrax, S. aurata, A. regius, S. salar, S. trutta, O....

02 June 2020 5,159 3 View

What is a good research topic related to SRAM memory design?

Please suggest a good research topic related to SRAM memory design Thanks, Veerabadra Chary R

07 February 2019 5,366 4 View

How perform subpixel level measurement of deformation using image processing?

Hi, I am working on subpixel level measurement of deformation using FPGA with the help of image processing technique. Can anybody suggest me the steps to be followed? As per citation pixel level...

14 March 2024 4,078 0 View

Is it possible to develop an ML algorithm for NTC, that works at synchronization of line speed (below 30 ms) using FPGA?

Is it possible to develop an ML algorithm for NTC, that works at the synchronization of line speed (below 30 ms) using an FPGA board? Like a next-generation firewall.

26 February 2024 6,254 0 View

Suggest me any good journal papers for the efficient NTC on real time traffic using FPGA and ML algorithms?

I am looking for a few good journal papers for my next work, which is used for efficient network traffic classification (NTC) using FPGA and ML algorithms for real-time NTC. It is a kind of...

26 February 2024 4,037 2 View

Are there resources for identifying the circuit elements of an FPGA?

I have been trying to find a resource to identify the circuit element structures (from an optical micrograph) of delidded/decapsulated electronic devices, including the imaged Xilinx Arty A7 FPGA....

13 September 2023 2,765 0 View

Overall zero values in Device Utilization Summary of a Verilog Module?

I created a project in vivado (target language: Verilog, FPGA Device: NEXYS 4 DDR). After successful simulation, synthesis and implementation of all the modules, I am getting Device Utilization...

01 June 2023 4,172 2 View

Anyone who has worked with the FPGA board Artix Ultrascale+ XEM8320?

I need help in monitoring the ADC(Model LTC2268-14) data which is interfaced with Artix Ultrascale+ XEM8320 board.

27 February 2023 9,687 5 View

Is it possible to construct a lock-in amplifier with FPGA in program?

Hello everyone. Can anyone tell me if it is possible to build a lock-in amplifier by recording all the signal and reference in FPGA and then doing integral over the recorded data? All the process...

06 December 2022 6,365 1 View

Hardware implementation FPGA Vivado(Verilog)?

𝙸𝚜 𝚝𝚑𝚎𝚛𝚎 𝚊𝚗𝚢𝚘𝚗𝚎 𝚊𝚟𝚊𝚒𝚕𝚊𝚋𝚕𝚎 𝚑𝚎𝚛𝚎 𝚠𝚑𝚘 𝚒𝚜 𝚠𝚘𝚛𝚔𝚒𝚗𝚐 𝚘𝚗 𝚑𝚊𝚛𝚍𝚠𝚊𝚛𝚎 𝚒𝚖𝚙𝚕𝚎𝚖𝚎𝚗𝚝𝚊𝚝𝚒𝚘𝚗 𝚝𝚑𝚛𝚘𝚞𝚐𝚑 𝚟𝚒𝚟𝚊𝚍𝚘 𝚝𝚘𝚘𝚕 𝚞𝚜𝚒𝚗𝚐 𝚟𝚎𝚛𝚒𝚕𝚘𝚐...𝚒 𝚗𝚎𝚎𝚍 𝚕𝚒𝚝𝚝𝚕𝚎 𝚋𝚒𝚝 𝚑𝚎𝚕𝚙 𝚛𝚎𝚐𝚊𝚛𝚍𝚒𝚗𝚐 𝚙𝚘𝚜𝚝 𝚜𝚢𝚗𝚝𝚑𝚎𝚜𝚒𝚜 𝚙𝚑𝚊𝚜𝚎 𝚊𝚗𝚍 𝚜𝚊𝚒𝚏 𝚏𝚒𝚕𝚎..𝙰𝚕𝚜𝚘 𝚒 𝚠𝚊𝚗𝚝 𝚝𝚘...

21 November 2022 2,282 0 View

Are DSP/FPGA based noise cancelling earmuffs available commercially??

There are many active noise cancelling headset available in the commercial market with umpteen technological virtuosity. Simila, Are there any DSP/FPGA with ex. TMS320c30 etc are available??

18 July 2022 2,921 0 View

How to implement CNN on FPGA?

I have designed a CNN model in python using TensorFlow. Now I need to implement the same model using Verilog on FPGA.

31 March 2022 5,991 3 View