In one of the articles, I read the following hypothesis:
We assume that the processor’s control logic is protected against faults via control-flow checking.
Regarding ARM processors, I wonder if the Program Counter Register (PC) is a part of the processor’s control logic or not.
From what I understand having little real application experience, PC register is located in the fetch stage of the datapath (making the assumption that the microarchitecture is based on the 5 stage pipeline style). The way it interacts with the control logic is by defining the output of the instruction memory. The output of the instruction memory is the actual input of the control logic "module". So, yes, it does affect control logic in an indirect way, but I would not define it as "part of the control logic" .
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