SOI Devices can be operated in low voltage.

Threshold Voltage can be set as very low with required Sub threshold slope value.

Due to insulation layer the junction capacitance reduced. 

Denser layout can be possible due to isolation.

Using SOI technology, the devices can made in nanoscale regime.

I have worked with both bulk CMOS devices and STMicro's FDSOI devices. I noticed following differences between the two:

1. SOI devices have much lesser parasitic capacitances than bulk CMOS. This is due to lack of reverse biased junctions in SOI devices. That means higher frequency of operation possible with SOI devices for same area/power.

2. SOI devices have more flexibility and range in controlling its bulk potential. Since there is no diode formed with bulk so bulk potential can vary from supply to ground (even more than that) for both PMOS and NMOS. This means body bias can be used very effectively to optimize power and performance.

3. FDSOI devices can show better device matching because the channel region is small and depleted.

4. FDSOI gives more flavor of NMOS/PMOS devices by different combinations of bulk doping (e.g. PMOS with n-well and p-well). This bulk is below insulator. Insulator here works as second gate.

5. On the flip side, the insulator may cause thermal issues because it is poor conductor of heat.

6. CDM/ESD is also worse in SOI as there are no parasitic diodes to supply or ground.

7. Also SOI does not have n-well capacitance that means little less decoupling capacitance on supply. But this is not a significant penalty.

Saurabh.