A deign-1 is implemented on the Virtex5 FPGA device and it utilizes the following resources:
LUT4 = 3
LUT5 = 29
LUT6 = 25
MUXF7 = 3
Similarly, deign-2 is also implemented on the same Virtex5 FPGA device and it utilizes the following resources:
LUT3 = 2
LUT4 = 47
LUT5 = 25
LUT6 = 10
MUXF7 = 5
How to compute the equivalent area for the above two designs for fair comparison?
Dear A mit,
welcome,
You can find from the data sheets of the FPGA chips the number of logic gates utilized in each logic device such as LUTs, Multiplexers and FFs. With this information available you can compare the area utilized in each design.
For more information please see the paper in the link: https://www.xilinx.com/support/documentation/application_notes/xapp059.pdf
Best wishes
Dear A mit,
welcome,
You can find from the data sheets of the FPGA chips the number of logic gates utilized in each logic device such as LUTs, Multiplexers and FFs. With this information available you can compare the area utilized in each design.
For more information please see the paper in the link: https://www.xilinx.com/support/documentation/application_notes/xapp059.pdf
Best wishes
thank you sir for sharing the document which will help me to compute the equivalent area utilization.
https://forums.xilinx.com/t5/Other-FPGA-Architectures/LUT-BRAM-Register/m-p/918206#M30787
Hi Amit Kumar Panda
The report of the synthesized or implemented design in Vivado gives the information of the amount of resources used in relation to the resources available according to the device selected for the project.
I think for FPGA, most of time we use Slice or CLB as a metric (unfortunately not exact). Because most FPGA complier optimise the designe using different CLB location and size. But i think you can specify which LUT you can use.
thanks Bakiri Mohammed for your comment. Yes that is what most FPGA synthesis tools are doing. Therefore, I believe, it is not the correct way to compare FPGA resources for two different design on same platform. The synthesis tool estimates the number of LUTs and other combinational resource blocks like MUX based on the number of intermediate signals.
- Badges
- Science topic
- Similar topics
- Solid State Physics
- Devices