There is much material on older technologies and for differential pairs but for current domain circuits we need large-L and stacked devices, not so many devices in parallel. I wonder what is the "best" layout regarding area-efficiency and matching in technologies like FDSOI and FinFet? E.g. to form a precise W=10um and L=40um current mirror? Presentations, deep thoughts, device simulations or measurement results are highly welcome.

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