BSIM-CMG model has only one gate terminal as for any mode, the gates are common. In the verilog code there are 5 inout terminals: g, s, d, e, t. Is 'e' the body terminal for Bulk mode? If yes, what is the 't' terminal?
I already know its a FinFET. But there is no clear statement anywhere what the 'e' and 't' pins are in the verilog code of the model.
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through origin software
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