From what I understand Amir ,

"punch thru" is predominantly a "Short channel effect" .

We know that , gate voltage (Vg) is the one that causes the channel starting from accumulation -> depletion -> Inversion . These phases happen as Vg increases . With VDD applied , we still have the Vg controlling the IDS .

With a shorter channel , not only does Vg has a role so does VGS and VDS. Remember there is already a junction depletion (at both source and drain by virtue of the construction say p -substrate and n+ Source and drain) . So when VDS >> ,these depletion at the drain "punch thru" the channel caused due to inversion (not a very pleasant situation)

How does VDS increase?? this again is when geometry of the device is smaller such that Vg has no effect or say Vg=0 then punch thru happens or VDS causes the flow of electrons (in the bulk or substrate )

Thank you Aparna for explanation. I understand the overal phenomena of punch-through and how it is going to relate to Vds and Vg, but what I do not understand is the concept of merging of two depletion regions with regard to their electric field directions. I would like to know exactly how two depletion regions with opposing electric field directions can intersect each other and merge into "one" depletion region (the attached figure).

With regards to the electric field , we know that V=Ed (fundamental relation) so , with voltage being grater at the drain than source (by virtue of bias there ) . This results in Vgs < Vds or as charges move so will the electric field change : Delta.V= - Ed , this is analytical and is also the phenomenon that happens due to short channel .

Interesting.

Thank you Aparna for your answer. Let me make another example:

Imagine the device does not have a gate (therefore it is probably not a MOSFET). We only have "drain" and "source" junctions (still in imagining mode!). We apply reverse bias to drain and extend the depletion region of drain so that it would intersect with the source junction depletion zone. Can you please explain how these two depletion regions interact with each other considering that they have opposing electric field directions? Do they cancel each other out or add up to each other. This is my main wondering.

Cheers,

Amir

Well Amir , punch thru happening is when Vg=0 . So physically -Sorry I can't imagine :) . Any way , if you say we are not having a gate in that case , only voltage that controls is the VDS and depletion on either of the junctions intersect then I would think of outcomes:

1. Depletion extending to the substrate or body - unless there is breakdown (something similar to Zener diode in reverse bias)

2. Or with field effect being opposite the e-h cause impact ionization as they travel under effect of the field with an increased kinetic energy (proportional to the field )

Again the field effect is to accelerate the carriers in the region . Their strength determines how the carriers travel and on the way cause "impacting" due to which there may be an increased carriers density (leading to/causing avalanche).

Dear Amir,

Hope you are well,

Thank you for inviting me to answer this question.

If you have an n-channel MOSFET it will have an npn structure at zero gate bias. So by applying a positive VDS voltage between the drain and source the drain junction will be reveres biased and the source junction will be forward biased, but the forward biasing of the source junction will be very small since the current flowing is controlled by the reverse biased drain junction and you see from the staring The applied VDS reduces the built in electric filed of the source junction and increases the potential difference on the drain junction. As the voltage increases the drain junction voltage increases by widening the space charge region while the source junction remains almost the same as the current is still very small. This continue until the VDS reaches value that deplete the whole remaining neutral substrate region where the two space charge region almost touch each other. As the voltage is increased further the drain space charge region expands while the space charge region of the source junction contracts meaning that its internal electric field decreases which means that the source junction becomes appreciable forward biased and the net barrier height at the source is appreciably decrease which enables electrons to flow with large number from source to drain. This is the punch through current signifying the onset of punch through breakdown.

Yes your expectation is correct, VDS lower the source potential barrier meaning decreasing g the built in electric field by imposing an applied opposite electric field.

Best wishes

Thank you Dr. Zekry, I appreciate your helpful answer. I would like to ask another question: what if the biasing of drain is done relative to ground, meaning the drain is reverse biased relative to the ground and therefore source's depletion region is not affected ( not lowered) and the source junction has not been forward biased. Can you please explain what would happen in this situation regarding the two depletion regions and also if there would be any current flow between drain and source.

Thanks!

Dear Amir,

welcome,

What is the potential of the source of the source electrode? Is it left open?

Best wishes

Yes. It is left open in the sense that it is not biased. Probably a voltmeter/sourcemeter is connected to it for measurement of voltage/current.

Dear Amir,

welcome again! when the source is left open, and the voltage is applied between the drain and substrate, then the drain space charge region will widen towards the substrate contact and towards the source and since the source is open and the current is zero its junction will be be clamped to the the built in potential which means that this junction remains at zero and consequently there will be no punch through current between the drain and source. what happens is that there will be an an avalanche breakdown the drain and substrate which is normally greater than the punch through voltage. This breakdown voltage is known as BV DB0 with open source. It is the breakdown voltage of the drain substrate junction.

You can yourself make such experiment in your laboratory.

I believe that the punch through breakdown occurs when two conditions are satisfied:

Widening the depletion region to accommodate the space between the drain and source and lowering the potential barrier at the source to allow heavy injection of majority carriers from the source.

Best wishes

Thank you Dr. Zekry for the answer. I have done some measurements myself and observed when the drain is reverse biased relative to source (Drain +/ Source -), the amount of current passing through the drain is higher than when drain is reverse biased relative to substrate (ground) and source is open. I think the difference here comes from the fact that when drain is reverse biased relative to source, the source junction is forward biased and therefore majority carriers start to flow toward drain and add to the overall drain current. However, when the drain is reverse biased relative to ground, the source junction will not be forward biased and therefore there will not be much of majority carrier flow toward drain, which means less overall current at drain. What is your thought on this statement?

Long ago Amir , there was "latch-up " effect that was happening (in CMOS due to parasitics ) so the depth of well or ion-implantation or buffers to avoid punch thru are part of the process.

Based on your measurements , the current does flow because electric field only accelerates the electrons (especially at the surface in planar devices ) . Again the ID changes impacts at the junctions mostly (doping profile) may show how much of breakdown happens generating a current (proportionally ) .

Take few more measurements and try plotting (old school way ) measurement at every junction vs ID

Dear Amir,

This what i said in my second post. It seems me that you went rapidly through it. It contains a precise explanation to your question. Th conditions of the punch through was never explained as clear as in my second post.

Any how i would like to than you for these interesting questions.

Best wishes