im doing a project based on turbo product codes so i want to know that is possible to implement ultra light turbo decoder and how it is differ from normal turbo decoder architecture??
thank you
Hello,
I think it's possible, but I'm not an expert on ULD...
Maybe you can find useful info here : https://www.accelercomm.com/sites/accelercomm.com/files/VLSI%20implementation%20of%20fully-parallel%20LTE%20turbo%20decoders.pdf
It's on a ASIC, not a FPGA, but the architecture seems to be implementable in FPGA.
Hi,
It is possible. You may check the following references.
- Maunder, Robert G. "A fully-parallel turbo decoding algorithm." IEEE Transactions on Communications 63, no. 8 (2015): 2762-2775.
- Gonzalez-Perez, Luis F., Lennin C. Yllescas-Calderon, and Ramón Parra-Michel. "Parallel and configurable turbo decoder implementation for 3GPP-LTE." In Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on, pp. 1-6. IEEE, 2013.
Li, An, Robert G. Maunder, Terrence Mak, Bashir M. Al-Hashimi, and Lajos Hanzo. "A scalable turbo decoding algorithm for high-throughput network-on-chip implementation." IEEE Access 4 (2016): 9880-9894.
Best,
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