DC common mode rejection depends mostly on resistor match, but only mostly. Any violation of perfect symmetrie reduces common mode rejection, including differences in the individual transistors.
AC common mode rejection in addition depends on differences in (stray) capacitances and inductances as well. (These result in phase differences between the 2 signal paths.)
Adding to the respected colleague Dreher, instrumentation amplifiers are characterized by very high common mode rejection ratio. If the differential gain is known, then you can calculate the common mode gain as the cmrr= Ad/Ac, the differential gain to the common mode gain. Since the output voltage Vo= Ad Vd + Ac Vc ,where Vd is the differential input and Vc is the common mode input you can estimate the allowed Vc for certain tolerate error in the measurement.
As for the common mode gain suppression it is normally accomplished by using emitter tailed with nearly ideal current sources which renders the bias current of the amplifier nearly independent of the common mode gain.
The common mode gain = about RC/RE where RC is the collector resistance of the differential pair and RE is the common emitter resistance.
As for the equivalent input offset voltage it is caused by the mismatch in the input differential amplifier. It can be compensated internally by the design or externally for finished devices. Instrumentation amplifiers are designed for low input offset voltage. However it could be compensated externally.
For AC applications the effect of the the input offset voltage is less pronounced than in the DC applications. If the frequency is high enough you can overlook the input offset voltage especially when reducing the gain of the amplifier by negative feedback which is normally the case.