ASIC technology progressively decreases their standard voltage from 5 to 3.3 to 2.5 to 1.8V ...

However, at the same times, the analogue signals stay at a level of about 1V at the input of ADC, and even larger for some analogue applications. Moreover, keeping high linearity performances in amplifier, analog buffer and other analogue processing, is not realy compatible with low voltage power supply.

Foundries "sale" VLSI/ASIC CMOS and BiCMOS technology exhibiting a recommended power supply.

Have you some recommendations or examples of mixed-designs applications using low-voltage ASIC technology with higher voltage supply for part of the design. For example, a mixed ASIC made of 2.5V ASIC technology biasing under 5V one of the last stages of an amplifier design (while satisfying the maximum breakdown voltage recommendations Vds, Vgs, Vce ...)?

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