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Questions related from Damien Prele
A SQUID (Superconducting QUantum Interference Device) can be used as a magnetic flux to voltage converter. A DC current biasing I_SQ=I_0 is usually apply. Looking at the I_SQ(V_SQ, Flux) output...
29 August 2022 5,657 0 View
We are using a R&S FSV3004 spectrum analyser. As many modern spectrum analyser it measures in dBm. To try an harmonic measurement of noise (noramlized per 1 Hz frequency unit) we have put a 10...
14 December 2020 7,333 0 View
We are developing voltage low noise differential amplifier in the DC - 100 MHz frequency range (See AwaXe in SiGe Integrated Circuit Developments for SQUID/TES Readout ). However, with input noise...
02 December 2020 6,935 1 View
Application-specific integrated circuit (ASIC) designs for space applications must address radiation environments that can changes stored values in registers. Indeed, high-energy particles can set...
24 June 2020 5,978 0 View
I hear that 100µm square PADs commonly used for VLSI design introduces a typical capacitance of about 5 pF (for sure it depends to many specific cases of packages). And a wire bonding used for...
12 May 2020 8,829 0 View
What is the maximum current we can pass in a typical (25 µm diameter, few mm long) wire-bonding used to interconnect ASIC/die/chip's I/O PADs to package's? We think about having a 100 mA current...
12 May 2020 5,533 0 View
In our current design of linear binary current steering low-noise CMOS slowDAC, we converged in the use of long channel NMOS transistors. Indeed, a low noise, lower than 10pA/√Hz at 100µA, and...
24 April 2020 7,652 2 View
DC current(or voltage) supply has to keep constant(DC) a current (or a voltage respectively) whatever the load ie evolution(AC) of the voltage (or the current respectively). This means that even...
26 March 2020 7,291 4 View
The 1/f (or flicker) noise of an LNA can strongly limit the sensitivity of a low-frequency detection chain. JFETs are well known as the best transistors, in terms of low-frequency noise. However,...
19 February 2020 804 0 View
ASIC technology progressively decreases their standard voltage from 5 to 3.3 to 2.5 to 1.8V ... However, at the same times, the analogue signals stay at a level of about 1V at the input of ADC,...
16 January 2020 3,203 3 View
Both long-channel and cascode MOS transistors are used in VLSI design to increase output impedance of current sources (for instances : AE_Lecture8_PartB_Incremental Model of FET or Bias circuit...
31 December 2019 1,561 4 View
I am designing voltage low noise amplifiers from long time using BiCMOS 0.35 SiGe AMS technology. I am looking for new ASIC technology and ask if the bipolar transistor is required for this kind...
17 December 2019 9,687 3 View
