I am looking at explaining undesirable MOS behaviors in a metal-ferroelectric-structure. I recently tried characterizing the capacitance-voltage behavior of a Bi4Ti3O12/P-Si junction, using a unique BTO doping, and a ZnO interface layer between the thin film and the semiconductor. The C-V behaviour in the attached image shows MOS behaviours, which is irregular for ferroelectric BTO. To determine if this effect is due to a lack of ferroelectrcity or not, I measured the ferroelectric properties of the device using the triangular waveform method, also attached, which presents a non-saturated ferroelectric loop, with signs of strong dielectric contribution.
I was able to conclude that measurements using the triangular waveform voltage method produced evidence of ferroelectric domain switching, were-as the MFS structure indicates non-ferroelectric switching, and am currently attempting to explain this phenomena.
My main theory, is that the I-V measurements detected leakage currents up to 0.023 A/cm2 when the maximum voltage of 5V was applied to the MFS device. This leakage current is several orders higher than reported in undoped BTO, but is similar to that of BTO using similar dopants. Whilst, I have been unable to find any references, I do recall reading that ferroelectrics unpolarised due to high leakage currents. As the MFS using a significantly slower sweeping bias than the triangular waveform voltage, ferroelectric polarization would be lost due to leakage current discharge in the MFS structure., if anyone could confirm this theory, or present another solution, I would be incredibly grateful.
Best Wishes
David Coathup
BTO on silicon is a type-II band offset (Amy, F. et al. "Band Offsets At Heterojunctions Between Srtio3 And Batio3 And Si(100)". Journal of Applied Physics 96.3 (2004): 1635-1639. This structure is leaky in nature and typical MOS depletion region should not be achievable. However, the other oxides like SiO2 underneath this leaky film can still show the type-I capacitance response. The model should be the ferro-electric capacitors in series with MOS. For the leaky structure the P-E extraction can be very tricky: 1) the depolarization field on semiconductor interface, 2) determination of actual surface potential and electric field across the ferro film 3) PUND measurements should be carefully done (look at Scott, J F. "Ferroelectrics Go Bananas". Journal of Physics: Condensed Matter 20.2 (2007): 021001. ) !!!! try P-U and N-D pulses to remove the leakage current. Also see Miller, S. L. and P. J. McWhorter. "Physics Of The Ferroelectric Nonvolatile Memory Field Effect Transistor". Journal of Applied Physics 72.12 (1992): 5999-6010.
Also here is our recent work:
https://arxiv.org/ftp/arxiv/papers/1703/1703.00126.pdf
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