Corners Analysis is performed to simulate your circuit's performance against a set of parameters belonging to extreme manufacturing variations. You may find the attached document useful for Corners Analysis.

Thank you sir !

create netlist after parastics extraction.... give that netlist path in adexl, and use corner analysis

Hello,

for running the corner analysis in post-layout simulation, you need to make a config cellview in your library, set that on your test circuit, and enable hierarchy editor from Lunch > Plugins > hierarchy editor. Finally set your block to extracted mode (just click on your block and click on set binding mode in hierarchy editor from hierarchy editor dropdown and set block as calibre (or extracted view)).

right now you can do corner analysis like past but this analysis runs on post_layout data.

that's video is very useful for our propose:

https://www.youtube.com/watch?v=661dmRnVp9M