25 October 2021 0 6K Report

I designed a algorithm in vhdl by using VIVADO 2018.2 IDE, in which most of input and output variables along with internal signals are floating point numbers. When I try to synthesize the code then following error occurs:

[Synth 8-502] non-constant real-valued expression is not supported. In google searching IP core or float-point package is being suggested but I am not familiar about it.

Any one, kindly help in this regard please.

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