I have written a verilog program in which some of lines of code runs based on positive edge of clock pulse (Ex: always @ (posedge clk) ). Therefore, the code requires a clock (clk) as one of the inputs. Assigning clock pulse as an input in the target device CMOD S6 (spartan 6) is possible and hence programming/flashing CMOD S6 become success. Also verified that the obtained output results are satisfactory.
Now, instead of flashing an external real world FPGA, I wish to flash the above code into the internal FPGA of Opal-RT target device OP4510 using system generator 14.7. However, I got stuck in accessing FPGA clock which is required, as I said before, as an input for the code. I have tried to use pulse generator as a clock input but can not set its frequecy as 8MHz (desired clock frequecy) due to simulation step time limitation.
I would be thankful for the relevant responses.
Hi,
In Opal-RT target device OP4510 contain Kintex 7 FPGA device. so for this fpga exterally connected clock you can use. In fpga you can write small clock divider circuit for desired clock frequency for your block. or internally you can generate a clock signal using Ring Oscilator.
Thanks for your response Harishnaik K P.
Yes, I wish to use clock pulse in the simulink model itself. My simulink model runs at minimum of 10e-6 sec. At this step time, I don't think its possible to create a ring oscillator for generating a 8 MHz clock pulse. This is why I am looking for alternative approaches.
Thanks for your response mam Aparna Sathya Murthy . I know this process and infact in the query itself I have mentioned that I had set the Gclk to the assigned pin in .ucf file. Later, it is programmed to an external FPGA board. Now, I am using "BlackBox" block of xilinx blockset library in the MATLAB-Simulink. This block only asks for '.v' file but not '.ucf'. So I am looking for suggestions for assigning clock in MATLAB.
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