Can someone suggest a generic tool for HW/SW partitioning? Something so I can compare the performance of HW/SW components in embedded system design with same functionality and then select one which better meets the performance requirements with design constraints for final implementation.
With cosimulation u may achieve the answer to you question.many tools are available which may solve but most favorable is MATLAB/Simulink with modelsimulator and xilinx for DSP based applications.
This project seems to be very promising:
http://rijndael.ece.vt.edu/gezel2/
This framework contains a language to describe the system that can be partitioned later. It is completely open source so new microprocessors models can be added.
System Verilog is an extension of the widespread hardware description language called Verilog.
I've never used, you can refer to:
http://en.wikipedia.org/wiki/SystemVerilog.
I suggest you SystemC. It is a C++ class library which allows a straightforward integration of code written in C and HDL. Please refer to:
http://www.accellera.org/community/systemc/
https://www.cs.ccu.edu.tw/~pahsiung/courses/codesign/resources/codesign-tools.html
http://www.spacecodesign.com/
GEZEL Hardware/Software Codesign Environment
http://rijndael.ece.vt.edu/gezel2/
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