Digital Twin NEWS! -ISO-IEC-JTC1-SC41-IoT has launched its Digital Twin framework standardisation at its Nov. Plenary. -Edge Computing & Networking, from VLSI to AI and back, in real time when needed, is essential in this endeavour, with specifications from ETSI (ETSI-ISG-MEC: Multi-Access Edge Computing), 3GPP and One M2M supporting this goal. Cyberphysical systems benefit highly of Digital Twins for optimised fault-tolerant operation, verification and validation, simulation, in particular. -Combining functionalities tightly is a must: software, efficient/secure and sustainable data handling, computing and networking may have to be jointly managed, and possibly integrated at every node of a system using fully Digital Twins.

Speed and energy efficiency are available from VLSI chips integrating two functional layers as the IMX500 from Sony: -Data layer: interfacing to the real world (analogue to digital sampling, and digital to analogue rendering, "data I/O" layer)

-Processing layer ("logic" layer) e.g. with AI algorithms to build or prepare decisions from the data acquired, and conversely to manage and implement decisions into the physical world.

Use cases include smart city functionalities, cognitive design/manufacturing, autonomous systems/vehicles.

What is your view on Digital Twin, in what role is it best positioned? Design? Operation? Fault correction? Other?

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