Dear Sivanandam,

Here is your answer a set of fundamental and advanced documentation attached files, I hope the study will allow you to refine your knowledge of the subject.

Best regards

Thanks Dear Mohamed Mourad Lafifi for your valuable documentation sharing.

Long time ago my project was a Greedy router for custom VLSI. On working at a company they used auto routing software, but it did not take detailed account of VLSI design rules (particularly in 3D). Experts would go over the routing & insert "dog-legs" where design rules would cause expansion of the routing. I used a simplified version of the design rule checker, to modify the routine & automatically insert the dog-legs, giving up to 20% reduction in silicon routing usage. That was year ago - I do not know what the state of the art is now.  Chip user manufacturing is a big cost - how many layers are they going to need on there board?  Rather than the academic algorithms, I would look at volume customer requirements first (unless you are working at semi-custom, low volume).