Saravanakumar Chandrasekaran

6 Questions 5 Answers 0 Followers

Questions related from Saravanakumar Chandrasekaran

How to implement and verify 64 bit adder in zynq Zedboard?

I m trying to verify the 64 bit adder (verilog progam) in zynq zedboard 7000. but it has only 8 number of DIP switches and 8 number of LEDs only. How to verify the adder with 64 bits. ie 64 + 64 =...

05 July 2023 3,728 2 View

Where can i get the XDC constraints file for Zynq7000 Zedboard of Digilent?

I am creating an IP in Xilinx Vivado. I need the constraints file (XDC) for pin assignments. I am using zynq7000 Zedboard from digilent

04 April 2023 7,049 0 View

How to check an IEEE conference is indexed in Wos?

Can any one suggest how to identify an IEEE conference indexed in Wos. One of my paper in a IEEE conference is indexed as shown in publons, where as a paper from other IEEE conference is not indexed.

30 December 2022 6,042 0 View

How to download TSMC 65nm GPLUS standard cell library data sheet?

I need to refer to TSMC 65nm GPLUS standard cell library data sheet. what are the methods to download it. if any one have it can post it. Thanks in advance

11 August 2020 1,941 0 View

How to determine the area occupied by the transistor level circuit?

I have designed an adder circuit at transistor level and simulated using LTSPICE. i need to find the area occupied by the circuit. Is there any free tool to determine it.

26 May 2020 371 0 View

Can Anyone suggest me on the methods to calculate the power dissipation of a simulated circuit in Tanner EDA?

I have simulated a circuit involving NMOS and PMOS transistors. I need to calculate the power dissipated for the circuit. i need help to do the calculation.

29 May 2019 4,280 4 View