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Questions related from Maryam Sharifi
Is there a seprate library for process variation (process corners) or monte carlo analysis of the circuits based on carbon nanotube field effect transistors like MOSFETs? Could we use process...
03 December 2016 5,484 1 View
In testing some full adders under same test-bed(discussed in link...
02 November 2016 2,968 5 View
How can we do sizing input and output buffers( Wgate of input and output buffers) with a given Cload for a test-bed with input and output buffers? As far as I know: Cload = k Cgate So, What Can we...
21 October 2016 1,207 0 View
With referring to the topic...
05 September 2016 2,349 4 View
At transistor level, I simulated a 1-bit full adder cell in a 16 cascaded full adder cells test-bed (attached), but an unstable state occured in outputs in specific transitions of inputs...
16 May 2016 6,809 14 View
I want to compare a cntfet based circuit with a mosfet based circuit, but I have just Vth value. How can I get Wn and Wp? As far as I know in digital circuits transistors act like a switch, so do...
04 April 2016 9,255 3 View
Some Articles assume 5% of the input signal’s pulse width as rise/fall time. Is there a Specific Formula for that (especially for Cnfets)?
16 January 2016 8,823 1 View
VA A Gnd PULSE (0 vdd 2ns 100ps 100ps 5ns 10ns)....measure tran delay_ar TRIG v(A) val='Supply*0.5' td=1ns rise=3 + TARG v(out) val='Supply*0.5' fall=3 What's wrong?
17 October 2015 1,983 4 View