For soft-error analysis, due to radiation event at reverse biased PMOS transistor causes 0 to 1 transition while reverse biased NMOS transistor leads to 1 to 0 transition.
What do you mean by reverse biasing of the transistor. This terminology is ambiguous, so it is needed to define exactly the potentials of the different terminals of the transistor.
The other question, which is the type of radiation and which is the radiation energy?
Your question is really interesting but you almost comprised the answer. Actually the SEU (soft error upset or bit transition from 0-to-1 or vice versa), caused by heavy ions to both NMOS and PMOS. As shown in the attached figure, the SEU causes a positive (hole) increase in IDs(t) followed by relaxation to zero in PMOS, which probably causes a temporary transition from 0-to-1. On the other hand, the SEU causes a negative (electrons) increase in IDs(t) followed by relaxation to zero in NMOS, which probably causes temporary transition from 1-to-0.