Hello dear Amit Das .

The reasons for this are important items in the history of the microelectronic fabrication.

At the following link, you can find sufficient relevant explanations:

https://www.quora.com/Why-is-polysilicon-used-as-a-gate-contact-instead-of-metal-in-CMOS

On the other hand, today, in some technologies where high-k (high dielectric permeability) dielectric materials are used instead of SiO2, metal is preferred as the gate conductor, whose reasons are covered satisfactorily at the following link:

https://www.quora.com/Why-is-a-metal-used-instead-of-polysilicon-for-high-k-gate-dielectric-in-CMOS

Best regards...

Thank you Ali Zeki sir.

Ali Zeki sir, I have read it somewhere that for an ideal MOS, work difference between metal and semiconductor is zero which we obtain in practical MOSFET if polysilicon gate is used. Is that true?

Dear Amit Das ,

Not exactly zero actually.

Bulk silicon is monocrystalline, but polysilicon is polycrystalline. Plus, their doping types (n or p) and levels will typically be different (Without sufficient doping, polysilicon will show much resistance). Nevertheless, the work function will remain significantly smaller relative to the case when the gate conductor is metal.

Another useful side is that, unlike a metal gate, the doping of the polysilicon can also be used to modulate the work function, thus the threshold voltage. However, this is not actually the conventional method for threshold adjustment. Usually the doping level at the surface (in the channel region) of the bulk semiconductor is modulated via ion implantation whose level is aimed to be controlled precisely for a well-controlled VTH adjustment.

Best regards...

Dear colleague, self-alligned gate process starts with formation of gate region followed by drain and source region. The source and drain region is created using ion-implantation method, which is a very high temperature annealing process. If metal is used as gate then it would melt. The melting point of polysilicon is higher, this is also one of the reason for choosing polysilicon over metal.

Thank you Sandeep Kumar for adding a point.

Dear Amit Das ,

The use of polysilicon has many advantages versus the metal gate:

-The work function of the gate material can be controlled by the doping of the polysilicon either p-type or an n-type,

- polysilicon is used as semimetal layer for conveying signals. and so one can add an additional layer of the integrated circuit to increase the interconnects and the transistor density.

- One can use them for self aligning the source and drain where one defines the gate, the source and drain simultaneously.

This decreases the fabrication tolerances and help increasing the integration density.

Best wishes

Thank you Abdelhalim abdelnaby Zekry sir.

Can you please explain the last point:One can use them for self aligning the source and drain where one defines the gate, the source and drain simultaneously?

Dear Amit Das ,

In case of metal gate, one has to produce at firs the source and drain regions by ion implantation through silicon oxide mask and then produce the gate by thin oxide followed by metal deposition. Here one needs another mask to pattern the gate oxide and then a mask to pattern the metal. These are three masks.

In case of polysilicon gate one produce the gate as well as source and drain windows with one mask. Then one can make the ion implantation to produce the source and drain regions. After which one deposit metal and pattern it to define metallization layer. As you see one needs only two masks instead of 3 in case of metal gate.

Then one saves one mask to produce the transistor.

You can review this information in the book of vlsi technology by S M Sze.

or any similar book.

Best wishes

Thank you Abdelhalim abdelnaby Zekry sir.

Dear Amit

In addition to the fabrication simplicity, the poly silicon gate is also more suitable due to weak functionality of metal (Aluminum for example) in high temperature fabrication processes.

Thank you Nima Shahpari sir for adding the point.

polysilicon works under high temperatures where as metal melts at high temperatures

Thank you Kadava R N Karthik .

Dear Amit Das,

Another factor that we move away from high-k metallic gate with miniaturisation of FETs, has to do with mobility degradation in channel and thus affecting all other subthreshold properties. Please look into below article which explains more on the same.

Article Simulation study on comparison between metal gate and polysi...