As i just only understand that pinch off actually occur when apply some voltage on drain (VD) until equal to the drain voltage saturation (VDS) so that the depletion region at drain is increasing due to electrical field at the drain edge is decrease, thus only small electron and even no electron is induced at the drain edge. i just want to know Why actually it occur?
the channel strength depends on the voltage difference of gate and substrate. Vgb=Vgs-Vbs. The appliction of a drain voltage raises the potential of the region of the substrate at the surface near the drain. This results a weaker channel at the drain end. If drain voltage is equal to saturation voltage then drain voltage becomes large enough to make gate voltage smaller than threshold. As a result channel does not exist at the drain end. This is called pinch off. So drain current does not increase if drain voltage increases further and it goes into saturation( for long channel devices).
Dear Mirwaiz.....
Nice answer!!, but even the current does not increase if drain voltage increases , so still got how a little current pass through the drain region when the weaker channel over there??;Right?
As you mentioned "If drain voltage is equal to saturation voltage then drain voltage becomes large enough to make gate voltage smaller than threshold. " meaning that at this time, the device will be turn off too?
And what u meant by long channel device?
no channel exist at the drain end. but current flows due to the electric field in the depletion region. when electron comes to pinch off region, they all swept out to drain by the depletion region electric field. no of electrons reaching to drain is lesser but their average velocity increases. this results a constant current at saturation.
Long channel devices means when the channel length is long enough(~micro meter range). if your channel length is in nanometer range you will not get a constant current at saturation, drain current increases slightly with Vds. this is called short channel effect.
Based on my understanding on your statement:"when electron come to the pinch off region, they all swept out to drain by the depletion region electric field." Is it like tunneling process? the electron reach the pinch off region and gain enough energy from electrical field to penetrate through the depletion region (May be like barrier) to the drain region. Am i right? Or different thing?
oh, i see...Understood on long channel device and short channel device. There is just a fabrication design?
Could you please help to look on this too:"
"If drain voltage is equal to saturation voltage then drain voltage becomes large enough to make gate voltage smaller than threshold. " meaning that at this time, the device will be turn off too?
Thanks,
Hi Ting Ting Chong
1) Why Channel Pinches off?
We know that for Saturation Region, Vgs≥Vt and Vds≥(Vgs-Vt). The Voltage at the Drain end is Vgd = Vgs-Vds, and this voltage Vgd≤Vt, which means at the drain end of the FET, the minimum voltage required to form inversion layer is not present, so the channel pinches off as we move from Source end where Voltage is Vgs≥Vt towards the Drain end where we have Vgd≤Vt.
2) How conduction takes place in pinch off region?
As you can see (refer to the EBD attached) in the Saturation Region where Vgs≥Vt and Vds≥(Vgs-Vt) → this is theoretical value of Vdsat, the conduction band rolls over to the drain side.
The slope of the conduction band means there is depletion region at the drain end and the higher the slope the higher the Electric Field.
The electrons (considering NFET) coming to the pinch off edge rolls down the slope of the conduction band and reach the drain side. (this is same as "swept off to the drain side")
P.S.: There is no tunneling at the pinch off region during the operation of a FET in saturation region. This conduction can be called as simple thermionic emission.
For more detailed explanation, you can refer to a basic level book Sung-Mo (Steve) Kang, Yusuf Leblebici-CMOS Digital Integrated Circuits Analysis & Design
Or Ben Streetman or Robert F. Pierret or Donald A. Neamen
hi everybody, i do understand some of your explanations about pich off phenomenon which are based on potential difference between Drain and Source. But my misunderstanding is: if VD is higher than VS, induced charge must be attracted toward to the Drain. It means that the inversion layer should be large towards the Drain ? it's so weird that my qualitative thought is opposed. Anybody help!
Dear Ting Ting Chong ,
I explained the pinch off phenomena in the field effect transistor. Pinch off occurs when the the inverted charge near the drain edge under the gate edge becomes zero at the VDS=VDSAT=VGS-Vtn for n-MOSt. Which means one has to put on the drain a voltage equals to the voltage which compensates the excess gate voltage that causes the inversion.
In this case the channel is fully inverted at the source side and aero inverted at the gate side near the drain.
I would like that you follow this topic in the book:Book Electronic devices with physical insight
Best wishes
Dear Ting Ting Chong ,
Other respectable researchers gave enough details. So I will not repeat them.
I want to make a comment on how current continues to flow when channel is no longer present at the drain side.
First of all, we should keep in mind that, "no channel at drain side" means the free electrons are no longer majority, but minority. That is, "no channel at drain side" does NOT mean there remained no free electrons to help the current continue to flow. They are only minority now but they still exist.
The channel conductance and the VGS voltage and the voltage across the channel (approx. VGS-VTH) will dictate a current along the channel (to which a large number of free electrons will contribute), and this current will continue to flow along the pinch-off region (to which a little number of free electrons will contribute). Obviously, to provide the same current level, the free electrons in the pinch-off region must travel much faster than the the free electrons travelling along the channel. The free electrons in the pinch-off region are aided by the large longitudinal electrical field in the pinch-off region. (Note that, if those electrons are required to travel at velocities above saturation velocity, they will fail, which is the point when velocity saturation effects start to limit the behavior).
I remember a book which was building an analogy between pinch-off and a pinched watering hose, through which a certain amount of water "current" flows (contributed by slow-running water drops through the hose), where pinching the tip of the hose helps to create water sprinkles which run much faster at the pinched tip.
Best regards...
I have one doubt, is it possible in output characteristics (Id Vs Vds) of FET, that the drain current decreases while increasing the gate voltage (Vgs). If so why?
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