Rakesh Krishna Vs most of the time, the PD is 'biased' at 0-V. I am not sure either case I or case II would work. I think to make it work. You have to make sure the TIA is biased at the best transconductance. The feedback resistor is also required.

see this for some ideas Article Systematic Simulation-Based Predictive Synthesis of Integrat...

Driving MOSFET is always tricky. In general you need a constant DC bias with signal added above that. So, you can have separate bias circuit independent of photo diode.

The high value of resistor (k ohm) as mentioned in the case 2 can be solved using high input impedance OpAmp buffer, which will provide low output impedance suitable to drive the MOSFET. As the photo diode selected is fixed, the order of series resistor is not going to change for getting desired voltage. Or if the resistor is reduced that can also be adjusted by little amplification using precision OpAmp. As I do not know the frequency range of operation it is difficult to recommend particular chip.

I will suggest to use I to V converter with Opamp where the current source is the PD connected at the input.

I guess the task that the PD generates the desired input signal which need to be processed. This may be helpful for certain extent. If still need solution, please explain little more about the problem / requirement then probably I can discuss some design with circuit diagram.

GOOD WORK SIR.

https://www.google.com/url?sa=t&source=web&rct=j&url=https://ieeexplore.ieee.org/document/7394498&ved=2ahUKEwj_lIDKoZ3pAhWnwzgGHafgDV4QFjAHegQIAhAB&usg=AOvVaw2UA0Mo2cITCI0mHFie1_dq

First note that in Case I the current source representing the photodiode will be in opposite polarity (even in zero biased photodiode the photo current direction correponds to reverse current in the photodiode).

However, if you use zero-biased photodiode (Case I) you should use differential input amplifier configured in such way that it maintains zero volt around photodiode.

In Case II you either connect the amplifier AC-coupled via capacitor or between photodiode and ground.

Generally, the input node potential of the transimpedance amplifier maintained by the feedback via the feedback resistor.

Some general introduction is e.g. here https://www.electronicdesign.com/technologies/analog/article/21801223/whats-all-this-transimpedance-amplifier-stuff-anyhow-part-1

To design best performance low noise high bandwidth transimpedance amplifier one should rely of N-MOSFET single ended configuration instead of differential stage which creates sqrt(2) more noise and x2 power consumption.

P-MOSFET is much worse regarding input capacitance then N-MOSFET.

Input differential stage or opamp are used when DC performance is more important than noise or when some very low noise opamps can be used.

Note that typical for low noise transimpedance amplifier can be low-bandwidth or integrating (well below the signal), in that case the bandwidth is recovered by the following high path filter. It is most pronounced in some subset of Transimpedance Amplifiers known as Charge Sensitive Amplifier (their feedback is made of parallel resistor and capacitor and resulting RC > signal duration).

There is some systematic approach to noise/bandwidth analysis, the important consideration being understanding of so-called series and parallel noise sources:

https://www.analog.com/en/technical-articles/transimpedance-amplifier-noise-considerations.html

https://www.ti.com/lit/an/sboa060/sboa060.pdf?ts=1588757493289

The deepest noise analysis was done for the related case of Charge sensitive Amplifiers e.g. http://web.mit.edu/course/22/22.09/ClassHandouts/LBL%20Detector%20Course%20Spieler/V-3-Resolution-3.pdf

Note that the first rule to follow is that Iphotodiode* Rfeedback or Iphotodiode* Rbias should be above 60..100mV or so to achieve best noise performance (26mV=kT/e being characteristic thermal voltage at 300K). The second rule is that the capacitance of the input MOSFET should be usually 1/3...1/2 of the photodiode capacitance.

Thank you all for your replies. To explain further, I designed a three stage inverter amplifier approach (as shown in the figures attached). The photodiode is modeled with a current source and capacitance. A feedback resistor is used connecting the input to output after three stages.

My intent was to use the gm/Id method and adjust the W/L values of MOSFETs to obtain gain. But from the simulation, I am not getting there with any amplification. For example, the Dc analysis shows an overall gain of the cascaded system to be 1.01. Any comments on why the voltage gain is not above 1 and where the problem is?

How do you define gain?

The transimpedance amplifier provides transimpedance gain defined as

Rtr = dU_out / dI_input ,

when open loop voltage gain Voltage_Gain is high (as it should be) :

Rtr = Rfeedback /( 1+ 1/Voltage_Gain) = approx Rfeedback

Nikolay, you're right about the TI gain. However, I am not finding consistency in these results obtained from cadence simulations. For example, running the DC cadence simulation for a 50uA input photocurrent and using the resistor feedback model, I am getting an output DC voltage of 474mV making the TI gain to be 79 dBohm. The AC simulation plot in cadence shows the gain plot to be maximum at 50dB (I am using the AC magnitude of current set to 1, and dc current of the current source set at 50uA)

I did the stability analysis separately to figure out if the loop gain shown is any different. It turns out to be 6 dB at maximum. I dont know where I am missing the link. Any help is greatly appreciated.

-Rakesh.

Rakesh, " 50uA input photocurrent and using the resistor feedback model, I am getting an output DC voltage of 474mV making the TI gain to be 79 dBoh" -

I think here you have a error, you incorporate DC pedestal or offset into your DC gain.

The actual DC output you obtain is is 474-424 = 50mV, that is voltage across feedback resistor 50mV/1Kohm = 50uA. So your transimpedance gain is correctly 1 Kohm.

If you put 0uA as the photodiode current, that will result in 424mV on the output and (same as input), that is the baseline or "DC zero" of your amplifier.

To obtain AC bandwidth, you should use AC current source parallel to the photodiode, and of small amplitude e.g. 1..10uA

Dear Rakesh,

In any case for the PD to work as a consatnt current source it must be biased in the reverse bias. So, case 1 must be modified by connecting the cathode of the PD to a reverse bias voltage and connect the anode to the gate of the transistor .

In order to operate the inverter as an amplifier you must connect the drain to the gate with high a feed back resistance. The photo current will pass in this resistance and change the output voltage accordingly.

Case two is okay except you have also to bias the inverter to act as amplifier by connecting a resistance between the drain and source.

In this case the inverter will act as a voltage amplifier amplifying the the voltage drop on the resistance R. That is the photocurrent will pass in R and develops a voltage which will be amplified by the voltage amplifier.

So, the resistance R acts as a current to voltage converter.

While as the case one the amplifier must be designed to be be a transimpedance amplifier by adjusting the feed back.

These are some concepts which can help you designing trans impedance amplifier .

The most straight forward transimpedance amplifier is an operational amplifier with the noninverting input is grounded and a feedback resistance Rf is connected from the output to the the the inverting input. Then the anode of the PD is connected to the inverting input while the cathode of the diode is connected to a positive voltage bias.

This is the classical configuration of the trans impedance amplifier.

Best wishes

Hi,

You might find the following paper helpful.

L. Orozco, "Programmable-gain transimpedance amplifiers maximize dynamic range in spectroscopy systems", Analog Dialogue, vol. 47, pp. 11-15, May 2013.

Vahid

Thank you Vahid, Zekry for those insights and suggestions.

As an update to Nikolay's previous response, I have tried xf simulation in cadence to obtain the transimpedance gain and it was found to be just around >50 dB. While I expected it to be around 60 dB since the feedback resistor is at 1k ohms, I think it has to do with the A/1+A factor in the TIA Gain.