Substrate Integrated Waveguide (SIW) having vias close to boundary (inside); work as inductive wall and confine the E field inside the center of the patch having those vias.
On fabrication side, each via is filled by narrow pin (of copper, silver, gold etc). However, would like to know whether these vias should be connected together or just stay as individual pin?
Vias are usually used to connect two metal layers. They are drilled or etched through the substrate. They are either filled with metals or cylindrical pins are inserted through them. Usually the top and the bottom end are soldered with the metal layer. An other way is to press these using hammer to make sure they are in contact with your metal layer (if you have a hard enough substrate).
Looking at the photo you shared, it is difficult to see what sort of configuration your vias are in. Secondly, the shape appears random. Soldering together (I assuming that you want to connect vias with each other) depends upon your design and application. The simulation you developed and the layout there can help you decide that in a better manner.
A general rule of thumb is to solder the vias as I mentioned. I you have conductive pastes available in your lab, you can also use that.
In an SIW structure, the transverse magnetic (TM) modes cannot be guided due to the dielectric gaps created by the via separations.
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