Hello Lambada Puneeth Raj ,

Please provide us with a better picture of your circuit and better pictures of your three waveforms. As it stands, it is very difficult to see any details.

Regards,

Tom Cuff

Hi Lambada Puneeth Raj , while I agree with Thomas Cuff that your diagrams are hardly recognizable I'll try to answer your question nevertheless:

You are going wrong when on one hand you accept that the "real" diode is modelled as an ideal diode parallel to a capacitor, and on the other hand you treat the "real" diode as an ideal diode (without C): "diode cant conduct in negative direction" It cannot conduct DC current but the capacitance poses a finite impedance to AC voltage.

The last vertical line in your plots 2 and 3 marks the instant when the diode switches off. Since its effect on the circuit vanished, now we have only the voltage source (ideally, impedance = 0), the inductance, and the capacitance in series, and these form a resonant circuit. As you noted, a negative current is flowing through L at this moment, so there is some energy left which is now moved back and forth between L and C.

Obviously, one or more of these three elements are not ideal but include some resistance, therefore the oscillation is attenuated.

BTW, I put real in quotation marks because in reality the voltage in forward direction at the diode would be greater than zero. So, this model made of an ideal diode and a capacitor is still an idealization.

Thomas Cuff sir, sorry for that blurry picture. Since it is from coursera I don't know whether i can share the screenshot or not. So here is a screenshot of the circuit and the corresponding graphs.

Joerg Fricke sir, thank you for your response. Sir, resonant circuit is pretty clear and the current gets attenuated due to non idealities in circuit elements. You mentioned "in reality the voltage in forward direction at the diode would be greater than zero." but how is it possible? isn't it reverse biased? If this model is ideal can u tell me where is the current flowing through from the inductor when diode got reverse biased (from semiconductor point of view would be helpful). I think this diode is modelled with a cap in parallel with it because diode when reverse biased stores the charge just like a cap and gives back the charge when forward biased. Please correct me if I am wrong.

Thanks in advance

Hello Lambada Puneeth Raj ,

Thank you for the clarification. I believe this is a very poorly posed problem. All the circuit elements (voltage source, inductor, capacitor, and diode) are independent, ideal elements. But at the same time, some of them are also said to exhibit effects we only associate with real elements. For example, there is some resistance present in the circuit, otherwise there would be no damped ringing of VB(t) for t > t3. Perhaps the inductor, L, has some parasitic resistance due to the finite electrical conductivity of the finite length of wire used to construct it. The ideal diode, D, we know has an ideal I-V curve, i.e., a L-shaped I-V curve because VB(t) is identically zero for the time, 0 to t2, when the diode is forward biased, i.e., when the diode is conducting, it does so without any forward voltage drop, and when it is reverse biased, there is no leakage current so its voltage drop equals the applied voltage. However, when it is forward biased, it exhibits stored charge, which is only a significant problem encountered in some real diodes. Note, the capacitor, C, is not related to the depletion capacitance (present when the diode is reversed biased) or the diffusion capacitance (present when the diode is forward biased) since the diode is assumed to be ideal; C is just a circuit element like L and vi(t).

I believe the circuit can be explained as follows. When vi(t) = V1, the ideal diode, D, acts as a ideal (perfect) voltage controlled switch, i.e., it shorts out the capacitor, C, causing VB(t) to be zero. When vi(t) = V2, the stored charge, which implies that the diode is real not ideal, begins to be removed at t = t2. For some reason, VB(t) begins decreasing from 0 volts before all the stored charge is removed. Once the ideal (real?) diode has loss some (all?) of its stored charge, it becomes a reversed bias ideal diode and, hence, acts like an open circuit allowing the capacitor, C, to interact with the voltage source and inductor.

Some of what I have said has already been alluded to by Joerg Fricke . I am not surprised that you are confused by this contrived, poorly posed problem. I hope I have not confused you even more.

I am sure you still have some questions so, please, do not hesitate to ask them. Someone will try to answer them.

Regards,

Tom Cuff

Thomas Cuff sir, analyzing the circuit as it is isn't a problem wrt me. Prof Erickson clearly mentioned that it is the "capacitance of depletion region". He has considered non idealities in the circuit(parasitic resistances in voltage source and inductor) but were not shown in the picture which explain the attenuation of current. So I think he is modelling the capacitic behavior of diode here. But what I don't get is where is the current actually flowing in the diode when the capacitor is modelled from the behavior of depletion region. The reason for whhyy the current continues to decrease even after t=t2 is because it should remove the stored minority carriers and get reversed biased until voltage across depletion region is -V2 .

Thanks in advance

Hi Lambada Puneeth Raj ,

There is nothing mentioned in the clarified diagrams you posted that explicitly says that the capacitor, C, represents the depletion capacitance of the diode. I think if the author had meant for C to represent the diode's depletion capacitance, he would have labelled it Cd not C. Even if C were the depletion capacitance of the diode, it could not be represented as a fixed value capacitor as the depletion capacitance decreases in value as the reverse voltage difference becomes more negative; the exact dependence depends on the doping profile of the PN junction. If you interested in the exact voltage dependence of the depletion capacitance, please see Working Paper Cuff Algorithm for Extraction of Parameters from C-V Plots, ...

If you look at any circuit diagrams that try to model real diodes, the depletion capacitance is shown in parallel to the ideal diode (I will try to find you some references, tomorrow). That means that AC currents or pulsating DC currents - after the mean value has been subtracted - essentially go around the ideal diode part of the model by flowing through the depletion capacitor, something that was mentioned by Joerg Fricke .

Regards,

Tom

Thomas Cuff sir, I am actually listening to these lectures so he mentioned it while he was explaining this stuff. Sir, I don't know if the capacitance value is constant or not and he didn't mention anything about the value either. He just specified that he is going explain about this kind of situation and just did the circuit analysis that you and Joerg Fricke thought of. Thank you for pointing out my doubt sir which I couldn't get it exactly. I want to know why diode is modelled that way and I guess that would help me understand how the current is flowing into cap and voltage across diode is being changed even when reverse biased(-V2). Thank you for your responses and references sir.

Hi Lambada Puneeth Raj , both equations and circuit diagrams are ways to describe the behavior of something. In my experience, sometimes students switch into the "math mode" when confronted with equations, and into the "basics of electromagnetism mode" when confronted with circuit diagrams, i.e. formally, they handle equations or circuits correctly, but they don't see the connection between the formal representation and the behavior of the represented object.

You repeatedly asked where the current in the inductor is going. If the capacitor C is meant to represent the capacitance of the depletion region in the reversed biased diode, this means that the n-conducting region, the depletion region, and the p-conducting region form indeed a capacitor, similar to two metal foils separated by a plastic film: If current is flowing into the n zone, then the density of free electrons decreases, and at the same time the density of holes in the p zone decreases, too, because current is flowing out of the p zone. And the strength of the electric field in the depletion region changes.

As Thomas Cuff pointed out, the difference between the capacitance of a film capacitor and the capacitance of a pn-junction is that the former is constant while the latter depends on the voltage. But apart from that, the capacitance of the depletion region is real, and is an inherent byproduct of the geometry of the pn-junction; so, it's impossible to design a diode with zero capacitance; similarly, it's impossible to design a mechanical switch without any capacitance when open.

When we consider mechanically switching off a voltage resp. current with a frequency of 50 Hz, we can neglect the capacitance because at this low frequency it amounts to an impedance of some Giga Ohm. But if we look at the datasheet of a switch suitable for some GHz, we will find that the open switch greatly attenuates the signal but still provides some coupling.

In principle, it's the same with diodes.

Hello Lambada Puneeth Raj ,

I have some citations to books that you can consult about the two types of capacitances associated with diodes: 1) depletion capacitance (also called junction or transition capacitance), which is only present when the diode is zero or reverse biased; and 2) diffusion capacitance, which is only present when the diode is forward biased. Note, diffusion capacitance is much larger than depletion capacitance and is where the stored charge resides due to the minority carriers. These two capacitances are in parallel with the ideal diode model. The lecturer to whom you are listening is not being accurate or complete when he discusses how the forward biased diode stores charge (in the diffusion capacitance), which he does not even mention, and the role of the depletion/junction/transition capacitance, which only comes into play when the diode is at zero or reverse bias.

[1] Charles A. Holt; Electric Circuits, Digital and Analog; John Wiley & Sons, Inc.; 1978; pp. 40-43.

[2] S. M. Sze; Semiconductor Devices, Physics and Technology; John Wiley & Sons, Inc.; 1985; pp. 83-87 & 98-100.

[3] Adel S. Sedra, Kenneth C. Smith; Microelectronic Circuits, 2nd Ed.; Holt, Rinehart and Winston; 1987; pp. 186-189 & 191-193.

Regards,

Tom Cuff

Joerg Fricke sir, it actually makes sense. I was thinking only one way about how the current would flow in the forward bias direction("due to the stored minority charge"). This is just like the reverse bias voltage across diode is getting changed. Thank you for the clarification about capacitances.

Thomas Cuff sir, I have gone through them and they have written the same thing that you have mentioned. Now I have a better idea of the model of the diode and what happened here. Thank you for your response sir.