hello,
I have built a logic circuit and i didn't use a clock inside my block,
*Now I am trying to simulate that cct to calculate the speed or latency, the ISim or Vivado simulator in the picture below shows that it took only 37ns to process and give a correct final output,
*the fpga kit used is Arty A7 35T
.
* how can I specify the max operating frequency or how many clocks it took? keeping in mind that my block does not have a clk signal
you have 35 ps latency in your combinatorical logic, this does not directly translate to maximum operation frequency at all, if you want to know the f max, you need to use your circuit in some more complete design that also includes clocked elemements, then vivado can estimate fmax, but you may also tweak with settings to get higher fmax. In short in the way you asked the question there is no direct answer. Some desing using your logic can run for sure above 100MHz but for more detailed indo run complete design timing checks.
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