I am working on a mixed-signal IC design using SystemVerilog - Real Number Modeling. I have to convert an expression argument into its integrated form. There is a circular integrator operator in Verilog-A, idtmod(), but I was not able to find any equal operator in SystemVerilog - RNM.
Does anyone have any knowledge upon this matter?
Aparna Sathya Murthy
If you can't then why not implement it since it is y=mx+c . You can create a package with your methods into SystemVerilog .
OR get a fixed point package (you can find it is open)
OR worst case : implement
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Nikolaos Georgoulopoulos
I was trying to gain some time, if there was already an operator like this. SO, of course, I would implement it otherwise. Appreciated the answer.
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